Process / pipelineControl systems, signal processing

Phase-Locked Loop

A Phase-Locked Loop (PLL) is a feedback control system that synchronizes an output oscillator to match the phase and frequency of an input signal. Introduced by Gardner in 1966, PLLs are ubiquitous in communications, radar, clock distribution, and power systems. The PLL continuously adjusts its oscillator frequency to minimize the phase error with the input, achieving lock. PLLs are fundamental to modern electronic systems.

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Sources

  1. Gardner, F. M. (1966). Phaselock Techniques. Wiley & Sons. link
  2. Wolaver, D. H. (1991). Phase-Locked-Loop Circuit Design. Prentice Hall. link
  3. Best, R. E. (2007). Phase-Locked Loops: Design, Simulation, and Applications (5th ed.). McGraw-Hill. DOI: 10.1036/0071493514

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Referenced by

ScholarGatePhase-Locked Loop (Phase-Locked Loop for Frequency Synchronization and Clock Recovery). Retrieved 2026-06-04 from https://scholargate.app/en/electrical-engineering/phase-locked-loop