Utengenezaji wa Kiotomatiki wa Vigezo vya Upimaji
Utengenezaji wa Kiotomatiki wa Vigezo vya Upimaji (ATPG) ni uundaji wa kiotomatiki wa vekta za upimaji zinazogundua kasoro za utengenezaji katika saketi za kidijitali. Ulianzishwa na Roth mwaka 1966, ATPG hupata kwa utaratibu pembejeo zinazofanya kasoro za 'stuck-at' kuonekana kwenye matokeo, kuwezesha ugunduzi wa kina wa kasoro. ATPG ni muhimu kwa utengenezaji wa semiconductor: kuwezesha chanjo ya juu ya upimaji huhakikisha kuwa chipu nzuri tu ndizo husafirishwa na kutambua masuala ya mchakato wa utengenezaji.
Soma mbinu kamili
Ingia kwa akaunti ya bure ili kusoma sehemu hii.
Method map
The neighbourhood of related methods — select a node to explore.
Vyanzo
- Abramovici, M., Breuer, M. A., & Friedman, A. D. (1990). Digital Systems Testing and Testable Design. Computer Science Press. link ↗
- Roth, J. P. (1966). Diagnosis of automata failures: A calculus and a method. IBM Journal of Research and Development, 10(4), 278-291. DOI: 10.1147/rd.104.0278 ↗
- Goel, P. (1981). An implicit enumeration algorithm to generate tests for combinational circuits. IEEE Transactions on Computers, 30(3), 215-222. link ↗
Jinsi ya kunukuu ukurasa huu
ScholarGate. (2026, June 3). Automatic Test Pattern Generation for Digital Circuits. ScholarGate. https://scholargate.app/sw/electrical-engineering/automatic-test-pattern-generation
Which method?
Set this method beside its closest kin and read them side by side — the library lays the books on the table; the choice is yours.
- Uchanganuzi wa MantikiUhandisi wa Umeme↔ compare
- Tofauti ya Mchakato wa Monte CarloUhandisi wa Umeme↔ compare
- Uchanganuzi wa Wakati UliowekwaUhandisi wa Umeme↔ compare
Imerejelewa na
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