Addressing Modes

Addressing modes are the rules by which an instruction specifies where its operands are located — in a register, embedded as an immediate, or in memory at an address computed from registers and offsets.

Definition

An addressing mode is a method specified by an instruction for determining the location of an operand, ranging from values held directly in registers or the instruction itself to addresses computed from base registers, index registers, and displacements.

Scope

This topic covers the ways operands are named and located: immediate, register, register-indirect, base-plus-displacement, indexed, PC-relative, and more complex computed modes. It treats how addressing modes affect code size, instruction count, and hardware complexity. It excludes how instructions are encoded in bits (instruction formats and encoding) and the system's virtual-to-physical translation (virtual memory and paging).

Core questions

• How does each addressing mode compute the effective address or value of an operand?
• Which addressing modes are most frequently used in real programs, and why?
• How do richer addressing modes reduce instruction count at the cost of hardware and decode complexity?
• Why do load-store architectures restrict memory access to a few simple modes?

Key concepts

• immediate addressing
• register addressing
• register-indirect addressing
• base-plus-displacement
• indexed addressing
• PC-relative addressing
• effective address computation
• load-store restriction

Mechanisms

Each addressing mode defines how the processor derives an operand. Immediate operands are encoded in the instruction; register operands are read from the register file; memory operands have an effective address computed by adding a base register, an optional scaled index, and a displacement. PC-relative addressing forms addresses relative to the program counter, which supports position-independent code and branch targets.

Clinical relevance

Addressing modes shape how compilers generate code: base-plus-displacement maps naturally to structure fields and stack variables, indexed modes to array access, and PC-relative addressing to position-independent executables and shared libraries. RISC load-store designs deliberately keep memory addressing simple to ease pipelining, while CISC machines offer richer modes for code density.

History

Early and CISC architectures accumulated many elaborate addressing modes, including memory-indirect and auto-increment forms. Empirical studies of instruction usage showed that a small set of simple modes accounts for most accesses, motivating the RISC decision to support only a handful of modes and confine memory access to load and store instructions.

Key figures

• John L. Hennessy
• David A. Patterson

Seminal works

• hennessy2019
• patterson2020

Frequently asked questions

Why do RISC architectures support so few addressing modes?

Studies found that programs overwhelmingly use a few simple modes. Restricting memory access to register-indirect and base-plus-displacement keeps the pipeline simple and effective-address computation fast, while compilers synthesize any richer access patterns from these primitives.

What is PC-relative addressing used for?

PC-relative addressing computes an address as an offset from the program counter. It is used for branch and jump targets and for accessing nearby data, enabling position-independent code that runs correctly regardless of where it is loaded in memory.